The present invention relates generally to RF amplifiers, and more specifically to utilization of schottky diode technology in RF amplifier circuitry to achieve increased RF amplifier gain, linearity, and switching speed.
Many RF power products commonly utilize multiple RF amplifier chains, with each successive RF amplifier chain having increased power and gain specifications with regard to the initial RF input signal provided to the RF amplifier system. In such RF power products, each RF amplifier chain ordinarily delivers a predetermined output level, and in pulsed mode may have a duty cycle that varies anywhere from 0% to 100%. One problem commonly encountered in achieving a digitally pure, distortionless reproduction of the initial RF input signal is that each amplifier of a chain must possess extremely fast switching speeds; often rise times of an amplifier must not exceed 10 to 20 pS, for example. A related problem exists in analog amplifiers when they tend toward compression and linear performance begins to degrade due to unchecked base-emitter rectification in common emitter mode. Examples of technologies which use multiple RF amplifier chains are digital television, digital and analog cellular telephone systems, and personal communications networks (PCNs), which presently operate up to 2 GHz. In these technologies, gain, linearity, and efficiency are prioritized and occasionally used as tradeoffs depending on system requirements.
One method which may be used to accomplish extremely fast amplifier switching speeds is to utilize common emitter rather than common base devices in the amplifier circuitry. However, while common emitter devices inherently offer fast amplifier switching speeds by significantly reducing rise time, there exists a tradeoff between gain and efficiency inherent to the two device configurations which must be considered. Thus, the gain and linearity which may be achieved in the Class AB mode of operation may be sacrificed for enhanced efficiency if the device operates in the Class B or Class C mode of operation. A logical progression, then, might be to use common emitter devices in the Class AB mode when a higher gain and linearity (less distortion) is desired and to use common emitter devices in the Class B or Class C mode of operation when increased efficiency is desired. Thus, for a variety of RF power technologies which use RF amplifier chains, there currently is a need to balance the characteristics of common emitter mode, common base mode, Class AB, Class B and Class C operation so as to achieve desired gain, linearity, switching speed, and efficiency.
A problem commonly encountered with transistor devices of a RF amplifier is that of a sliding bias or quiescent (Q) point of a transistor device. A common emitter RF transistor utilized in an RF amplifier is typically on for the positive half of the RF input signal cycle and off for the negative half of the RF input signal cycle. During the negative half of the cycle when the RF transistor is off and reverse or back biased, the capacitance of the base-emitter junction of the RF transistor increases in magnitude as the voltage of the RF input signal increases in a negative-going direction, thereby accumulating stored charge during the negative half of the cycle. The greater the amplitude of the negative-going voltage of the RF input signal during the negative half of the RF cycle, the greater the amount of stored charge accumulated by the capacitance of the base-emitter junction of the RF transistor, and the further the RF transistor's bias point slides toward class C operation.
Referring to FIG. 1, the Vbe bias curve of a RF transistor during the negative half and positive half of a RF cycle is shown. The voltage represented by the Vbe bias curve is allowed to increase, when unchecked, in a negative-going direction during the negative half of the RF cycle to some voltage X. Typically, the voltage at point X can become very strongly negative, depending on the bias network of the RF transistor, and is limited by the maximum permissible deviation dictated by the BV.sub.EBO, the breakdown voltage of the emitter-base junction with the collector open, of the RF transistor.
The stored charge accumulated by the capacitance of the base-emitter junction represents a significant problem for the RF transistor during the subsequent positive half cycle of the RF input signal. When the RF transistor attempts to turn on, it must overcome this reactively stored charge, which necessarily impedes the switching speed of the RF transistor. As the RF transistor thus attempts to move from a reverse bias to a forward bias condition, the base-emitter rectification pushes the bias point of the RF transistor in a negative direction down the load line of the device, thereby affecting the class of operation of the device. Thus, a transistor in the Class AB mode of operation may be forced into a Class B or even a Class C mode of operation. This is the sliding bias point problem.
The movement from one class of operation to another class of operation has obvious effects on gain, linearity, and efficiency. For example, for a transistor in the Class AB mode of operation, it is desirable to establish a bias point which will be held relatively constant so that constant gain may be achieved until the transistor is in its saturation region. Otherwise, a sliding bias point is a source of non-linear distortion. Thus, there is a current unmet need in the art to stabilize the bias point as much as possible by minimizing the negative voltage level during a negative half of the cycle so that base-emitter junction stored charge is minimized and thus changes in mode of operation associated with a sliding bias point are minimized. Ideally, the bias point should remain at a quiescent or operating point of approximately 0.7 volts.
U.S. Pat. No. 3,513,406 granted on May 19, 1970 to Charles B. Leuthauser, enclosed in the attached Information Disclosure Statement filed herewith, discloses a circuit and a method for limiting the negative-going voltage of the RF input signal during the negative half of the RF cycle. The 3,513,406 patent utilizes a compensating network, shown in FIG. 2 of the Leuthauser patent, which features a diode 35 that becomes forward biased and conducts when the Vbe bias becomes sufficiently negative at point Pc. Referring to FIG. 2, a Vbe bias curve representative of the improvement disclosed in the 3,513,406 patent is shown. When the power output level of the RF transistor exceeds point Pc, the RF transistor 20 remains biased at -0.7 volts. During the negative half of the RF cycle, the Vbe DC bias level drops from 0.7 volts to an average DC level of -0.7 volts before leveling off, and since the DC biasing network may become reactively charged, the peak AC excursions may become strongly negative until reaching the BV.sub.EBO of the RF transistor.
The compensating network described in the 3,513,406 patent represents a tremendous improvement over the prior art where the amount of negative-going voltage during the negative half cycle was not limited at all. By limiting the bias point to -0.7 volts, RF transistor 20 has much less stored charge to overcome during a subsequent positive half cycle. While the Leuthauser patent was an improvement, there continues to be an unmet need in the art to minimize base-emitter capacitor stored charge even more so that the gain, linearity, switching speed, and efficiency associated with a given class of operation may be preserved and enhanced. Additionally, while the Leuthauser patent limits the average level of stored charge, there remains the need to eliminate or dissipate the strongly negative level of reactively stored charge in the biasing network during the negative half of the RF input signal. Not so limiting this reactively stored charge has an additional, harmful impact on linearity and can degrade the reliability of the RF transistor as well.